The San Jose-located company expects that thanks to this new device it will be able to meet the demands of a broad selection of space-sensitive applications requiring non-volatile solutions, including such key areas as multimedia encoding/decoding, data compression/decompression, and microcontroller systems. The device offers 20 years worth of data retention and 100,000 write/erase cycles. It has two lower power modes to keep energy consumption to a minimum. When in «suspend" mode, it can achieve a 40% power reduction over normal Spartan-III devices, with a wake-up time of less than 100ms, as well as system-level synchronisation across time domains. In «hibernate" mode, it achieves as much as 99% static power reduction on other devices in this portfolio. It will be available with up to 1.4 million system gates. 11Mbits of user NOR Flash will allow additional configurations to be stored so that other application functionality can be accessed. At the press conference I attended in California, Xilinx' CEO Wim Roelandts exclaimed, to announce this release, "This is a chance for design engineers to gain the best of both worlds - the security and power savings of Flash merged with the simplicity and cost-effectiveness of SRAM." When asked about whether the use of this sort of hybrid solution would be ongoing, Roelandts responded: "We feel there is great value in this stacked-chip methodology and see no reason why further chips using it will not be added to the Xilinx product range in the future." He would not give specifics about what the firm's roadmap in this direction might be though, and wasn't persuaded to comment on whether a non-volatile version of its flagship 65nm Virtex-5 might be considered. I asked Gartner's programmable-logic expert, Bryan Lewis, for his thoughts on the potential of Flash FPGAs. He stated, «Flash technology will become increasingly important in many applications, and it is interesting that with this part Xilinx has decided to stack ththe Flash on the FPGA die to help control the cost. SiP packaging technology has come a long way because of its widespread use in cell phones, and now it is very costeffective to stack the die rather than embed it into the FPGA die."
On matters of security
The Spartan-3AN platform offers a number of security features for safeguarding against reverse engineering, cloning, and unauthorised overbuilding. Its Device DNA technology provides a low-cost, but effective, mechanism for authenticating a valid design and ensuring flexible designlevel security. Designers should thereby have full flexibility in customising algorithms for both authentication as well as responses to failures. With its embedded Flash, the platform further optimises security by hiding any configuration communication from the outside, making it extremely difficult to understand the design contained within the FPGA. The factory Flash ID is different in every device, offering a 64byte long word that can be read and added into the authentication algorithm. The Flash user field is a one-time programmable word that can be employed to store the authentication result. This field can also be used to store revision-tracking serial numbers or user-data constants that will never be changed in the system.
Sibling rivalry
So what does the competition think? You might expect that Actel, which has long been involved in Flash-based programmable-logic solutions - and seems to have carved out a nice little niche for itself - to be somewhat worried by its far larger counterpart setting up camp in its backyard. However, if it is, it certainly isn't letting it show. Senior vice president of sales Dennis Kish seems unfazed: "First of all, with Xilinx entering the Flash market, we feel that our long-standing strategy has been validated, as Actel had seen the value of non-volatile products several years back. However, this new device doesn't seem to have realised many of the advantages of Flash technology, as they are stifled by being amalgamated with SRAM. This is basically the same as having a two-chip solution on a board, which is something that is far from new. The only upside here is that space is saved since the chips are one on top of the other." He also feels that"With regard to security, this doesn't really deliver the same sort of levels that we already have with our devices. On power consumption it simply can't compete as it still has all the inherent drain of the SRAM die to contend with, so the power reductions that Xilinx claims are only relative to their own chips, not to the benchmarks that Actel has already set. From a cost standpoint it is only matching the same sort of price points that we are, but with a less optimised product. They aren't really breaking any new ground here."Kish also questions the value of the user Flash memory, suggesting that this may not in fact be usable as a means to hold extra configuration data, because the interface from it isn't fast enough to allow quick transfer of information. In his opinion, "Designers really need to look at a pure Flash solution if they want to benefit from this technology. That way the static power and security aspects are not diluted as they appear to be here."All this said, it must be slightly worrying for Actel, a as its rival is a far larger beast. Whether its first foray into this market is a strong opening or a turkey may not be all that important. With a huge R&D resource at its disposal, and a strong market presence to back this up, if Xilinx decides that this is a route it will continue to travel down then any incumbents already there will have a hard battle to stay ahead. So although it is still too early to say if Xilinx will gain traction in this sector, or if the Spartan-3AN is more of a publicity stunt, it might herald the introduction of a whole new generation of programmable-logic designs that utilise non-volatile technology. So whoever comes out on top, Flash FPGAs have a prosperous future ahead of them.
