The DS3641 is a secure battery-backup controller designed for data protection in POS (pointof-sale) terminals and other applications containing sensitive data. Integrating an RTC (real-time clock), an automatic battery switch and a 4-wire interface in a CSBGA for added security, this controller provides active tamper detection and rapid erasure of key memory. The chip not only supports FIPS 140 security levels 3 and 4, but also meets the highest requirements of the Common Criteria, PCI-PED, and EMV-4.1 certification entities. The most innovative feature of the controller is the proprietary on-chip nonvolatile SRAM it uses to store encryption keys. This memory architecture constantly complements the SRAM cells to eliminate the possibility of memory imprinting due to oxide stress. This technology prevents the passive detection of data remnants in stressed memory cells. The entire 1kbyte array is immediately cleared in less than 100ns after a tamper alarm has been generated by the DS3641. This is enabled by the memory's high-speed hardwired clearing function and on-chip energy source, which ensures active erasure. The controller provides tamper-detection inputs to interface with the system voltages, resistive meshes, external sensors, and digital interlocks. The inputs also enable the continuous monitoring of these parameters. Moreover, the RTC's crystal oscillator is monitored and will invoke a tamper response if the frequency falls outside a set threshold. The internal digital temperature sensor integrates a programmable rate-of-change detector and protects the device's internal encryption-key memory from thermal attacks. Additionally, the the controller constantly monitors primary power; in the event of a primary power failure, an external battery source automatically switches on to keep the SRAM, RTC, and tamper-detection circuitry alive. The IC operates over the -40 to +85°C temperature range.