Atmel Corporation has released low power 32-bit Flash microcontrollers. Based on Atmel's AVR32 UC core, UC3A Series has 512K bytes Flash and feature an embedded 10/100 Ethernet MAC, a full-speed (12 Mbps) USB 2.0 with on-the-go (OTG) capability and an SRAM/SDRAM external bus interface.
The AT32UC3A0512 and AT32UC3A1512 deliver 80 Dhrystone MIPS (DMIPS) at 66 MHz and consume only 40 mA at 3.3V. The power consumption, as low as 1.65 mW/DMIPS, outperforms other architectures with similar features by a ratio of up to 4X. The new MCUs target networking and PC-centric embedded applications and are especially suited for portable devices.
The AVR32 UC core uses a three-stage pipeline Harvard architecture specially designed to optimize instruction fetches from on-chip Flash memory. The AVR32 UC core integrates single-cycle read/write SRAM with a direct interface to the CPU that bypasses the system bus to achieve faster execution, cycle determinism and lower power consumption.
The AVR32 UC core shares the same instruction set architecture (ISA) as its AVR32 AP parent, with over 220 modeless instructions available as 16-bit compact and 32-bit extended instructions.
The ISA features atomic bit manipulation to control on-chip peripherals and general purpose IOs and fixed point DSP arithmetic such as single cycle fractional saturated multiply-and-accumulate. An event handling system supports events such as prioritised interrupts, non-maskable interrupt and internal exceptions with a maximum interrupt latency of 16 clock cycles.
The AVR32 UC3A series incorporates many of the same peripherals as Atmel's ARM-based MCUs including the peripheral DMA controller, multi-layer high speed bus architecture, 10-bit ADC, two SPIs, SSC, two-wire interface (I2C compatible), four UARTs, three general purpose timers, seven pulse width modulators and a full set of supervisory functions.
The 10/100-Mbps IEEE 802.3-compliant Ethernet (MAC) allows designing networked embedded systems that communicate over internet protocol stacks. The USB 2.0 full speed (12Mbps) interface provides a means to communicate with today's PC architecture through various USB classes such as HID for serial data communication or Mass-Storage for larger bulked data transfers.
The On-The-Go (OTG) capability of the UC3A USB peripheral gives further integration opportunity in a PC-centric environment with the support of standard USB devices such as USB Flash disk, pointing devices or printers.
The external bus interface (EBI) extends the addressable physical memory to 16M bytes. Its non-multiplexed 16-bit data bus can interface to high density external SRAM, SDRAM, ROM, Flash devices and memory-mapped devices such as LCDs or FPGAs.
UC3A series MCUs have a six-layer high speed bus matrix that enables bus masters peripherals to concurrently access any bus slave at a maximum speed of 264M bytes per second at 66 MHz. The bus masters are the AVR32 UC core data and instruction interfaces, 15-channel peripheral DMA controller, and several high speed peripherals such as the Ethernet MAC and USB. The bus slaves are the on-chip SRAM and Flash memories, USB, the two peripheral bus bridges, and the external bus interface (EBI).
Development tools:Atmel provides the GNU gcc C compiler, GNU gdb debugger and lwIP TCP/IP protocol stack for the UC3A series family. Commercial licenses from IAR (Embedded Workbench), ExpressLogic (ThreadX) and Micrium (uCOS/II) are also available.
Atmel's AVR32 Studio and AVR JTAGICE mkII, provide the AVR32 UC with a multiplatform integrated development environment (IDE) already configured for the GNU tool chain, including support for more advanced debugging such as real-time trace.
The EVK1100 evaluation kit provides Ethernet and USB interfaces, along with many other serial communications ports such as SPI, TWI and USARTS. A 20x4 character LCD and the expansion connector allow advanced product evaluation and prototyping activities.
The AT32UC3A0512, with EBI, is available in a 144-pin QFP package and the AT32UC3A1512, without EBI, is available in a 100-pin QFP package.
