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Product group : Linear ICs
Product Sub-group : Analogue & Mixed Signal ICs
Generating Multiple Supply Voltages in a System
Using high voltages, above...
Most systems require more than just one single supply voltage. The requirements change greatly depending on the application, the type of loads involved and the level of voltages and power needed. The questions one hears almost daily show that there is a need to detail the very basic thoughts behind generating and controlling multiple supply voltages. This article will discuss different scenarios.
01/04/2007
Reference: 22857

Using high voltages, above 24V - from backup systems or truck batteries for example - has its advantages: heavy loads can easily be driven, as the input currents stay at reasonable levels. With voltages in the range of 50V and higher, one uses either isolated or non-isolated conversion. Which one to consider is application-dependent (Figure 1).

Isolated output voltages

When creating a set of voltages - such as ±12V or ±5V, all at several amperes - one can use the flyback architecture (Figure 2). On top of four different outputs, isolated from each other and driven by one power IC, a user might also wish for regulation. In this architecture, only one of the voltages can be regulated; the other three are fixed. This is acceptable if those voltages are just used as intermediate supply lines; regulation then would be PoL (Point of Load) at the devices to be supplied.

Non-isolated voltages

One circuit designed to generate multiple regulated output voltages at high currents is the LM5115A, which taps into the phase signal right after the transformer. Thus the device does not load the regulated main output voltage, and hence does not inflate the size and cost of the rectifier and filter of that voltage (as it would when connecting a regulator to the main output voltage and then doing post-regulation). Another advantage of this SSPR (secondary-side-post regulation) is that the supply voltage can be routed through the board or device and the regulation can be located to where it is needed: close to the load. Any voltage drop due to load current is negligible, as regulation happens after the routing. The chip features a tracking capability to synchronise the turn-on behavior relative to a master voltage. Multiple devices can be connected to the same power line and are synchronised by the main voltage signal (Figure 3).

Driving processors and FPGAs

Those digital circuits are quite demanding in that they consume a lot of power and have very tight supply budgets: 3.3V and 1.2 to 1.8V at several amperes, and a regulation of 100mV or less is typical. Using an unregulated 12V rail means a step-down factor of 10 and the maintenance of a very tight output-voltage tolerance. The power device needs to have a control loop that is fast enough to catch those load changes. The common architecture is current-mode control. But with high drop factors - which correspond to very short duty cycles -, current mode has its limitations: measuring current in very short on-times is difficult or even impossible. Most current-mode controllers have a minimum on-time specified at 150 to 200ns. This, on the other hand, limits the duty cycle and does not allow high drop rates.

Emulated current mode

A much better architecture is EMC (emulated current mode), which uses the off-time to measure the load current. Another effect is that a short-circuit during the off-time - which can be over 90% of the duty cycle - will prevent the power switch from being turned on, which helps reducing short-circuit current. ECM enables higher drop rates than any other architecture: National Semiconductor's online tool Webench can be used to drop 24 or even 48V down to 1.25V. You can check out the on-time and see what ECM allows you to do. The new Simple Switcher regulators are well-suited to achieve these high drop rates. Synchronising the two supplies is easy in this example: use the core voltage to enable the I/O voltage regulator. This way I/O will not be enabled unless the core voltage has crossed the high threshold of the I/O regulator. At that time, core is already close to be stable, and I/O just starts slewing. If needed, an extra R/C can slow I/O down further, allowing a longer time between core and I/O.


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