Ericsson has introduced a 30A power block that addresses CCA (centralised control architecture) in power distribution and management. The ROA1283003 is designed to meet the requirements of multiple power rails applications where cost, efficiency and flexibility are mandatory. The product is a suitable solution to power FPGA and other processors. CCA is based on a centralised power management controller that drives single or multiple switching termination modules known as Œpower blocks. The product provides Œdesign for versatility in many applications. It can be inserted as a power stage, controlled by a single or multiple-phase PWM.
The product complements the company's wide range of isolated and non-isolated products that address distributed power architectures and simplifies power management in modern ICT (information and communication technology) applications. The device accepts input voltages in the range of 7 to 13.2V and provides an output in the range of 0.8 to 3.3V. This power block features high full load efficiency at 3.3Vout. The product is based on the company's in-house capability of layout optimisation and reduction of power losses to minimum. In high-efficiency power switching topologies, the power block contributes to reduce overall power consumption. It lowers the heat generated by power terminations. Its 4.89 million hours MTBF will contribute to the systems' reliability.
Combined with an external controller, the device provides downstream protection of critical and expensive components in high-current applications and active load management, delivering the required current under any load conditions. The product meets the flexibility required by systems architects. It is designed for paralleling operation and allows scalability, in order to deliver higher currents on demand. The product has an in-built temperature sensor device and DCR sense pin. The power block offers additional flexibility to system designers when selecting an efficient on-board power solution.
On a typical application board, there are restrictions in power design when it comes to copper layer thickness, vias density, number of available layers and space. The power blocks allow an application board designer to achieve high efficiency despite these restrictions. The power block matches the first generation of power blocks' footprint and lead-free surface mount assembling requirements. It can easily upgrade existing boards in order to benefit from its high efficiency and low profile of maximum 11.4mm or 0.45inch. The product is delivered in an antistatic tape that complies with the EIA 481 standard and dry-pack that complies with the IPC/JEDEC standard J-STD-033. The power block eases board assembly processes.
