JTAG Technologies has announced a new economically-priced software and hardware system for the show. It has been developed for board-level and system designers looking to benefit from a boundary-scan test and programming strategy. The ProVision Designer Station has key features such as automatic test program generation (ATPG) for interconnections and in-system programming (ISP) for devices. It will prepare boundary-scan test routines that might be used in the design environment and beyond. The tool incorporates a highly automated test program generator for interconnects that takes advantage of a library of thousands of non-boundary-scan (cluster) device models to create a safe [to execute], high-quality core test. Rapid generation and execution of this so-called ‘Interconnect Test' using the handy JT 3705/USB controller, that is included with the system, allows the user to gain quickly confidence that the core boundary-scan to boundary-scan pin connections of a design are defect-free. The system also includes a scripting library known as JFT (JTAG Functional Test) that harnesses the power of the open-source Python language to add sophisticated test options for logic clusters and for the programming of memory devices. Furthermore, additional interactive tools, such as ActiveTest, enable rapid generation of simple cluster tests and checks that might require only a small number of test patterns.
