MIPS Technologies has claimed to have introduced a processor that offers enhanced speed for synthesisable multicore IP. The company further claims with the MIPS32 1074K CPS (Coherent Processing System), users can obtain high performance of a custom implementation with an off-the-shelf CPU core. Using commercially-available standard cell libraries, memories and EDA design flows, the 1074K CPS approaches production frequencies of 1.5GHz in 40nm G process. With the 1074K CPS, the company is making multicore performance accessible and affordable for companies developing internet-connected multimedia products such as digital televisions, Blu-ray players and STBs (set-top boxes). This platform targets home/wireless networking products and tablet computers leveraging the Android operating system. The CPS is built on the proven, superscalar 74K microarchitecture. There are production designs in the market based on the 74K core, and MIPS customers are in pre-production with 74K implementations that reach 1GHz. Enhancements to the 74K architecture enhance performance on a variety of C++ applications, including web browsing and JavaScript engines. In addition to these hardware enhancements, the company‘s software optimisations have added to the performance on major open source projects such as Webkit. When run on a 1074K platform at 1.5GHz, a single core can complete the popular Sunspider benchmark for JavaScript engine performance under two seconds. The 1074K CPS provides connectivity of up to four superscalar Out-of-Order 74K cores plus system components for clock/power gating management, global interrupt control, program/data trace functionality, and optional L2 cache controller as a complete coherent multicore solution. The company offers two paths to performance through its CMP products, depending on the specific application. The multi-threaded 1004K CPS provides enhanced performance for applications such as smartphones and advanced set-top boxes where multiple tasks run simultaneously, and real-time response and performance efficiency are key requirements. The 1074K CPS is targeted for applications such as web-connected DTVs and set-top boxes and home/wireless networking. The MIPS architecture has been implemented in multicore systems supported by a robust ecosystem, claims the company. The CPS is MIPS32-compliant. The CPS is supported by tools from CodeSourcery, CriticalBlue and others, including the company‘s own development tools and probes, and symmetric multiprocessing versions of the Linux operating system. SoC developers can leverage 100% cycle accurate models that are built with technology from Carbon Design Systems for verification in SystemC and co-simulation environments. Software developers can also take advantage of fast instruction set simulators developed in conjunction with Imperas for use in software development and virtual platforms.
