The Virtex-7 HT FPGAs from Xilinx have demonstrated 28Gbit/s serial transceiver performance which is required for next generation 100 to 400Gbit/s applications. The 28nm FPGAs are equipped with the industry's highest-speed and lowest jitter serial transceivers available in an FPGA, claims the company. They are thus able to support stringent optical and backplane protocols. Built with four to 16 28Gbit/s transceivers complying with OIF CEI-28G, the Optical Internetworking Forum's Common Electrical I/O specification for 28Gbit/s, the devices are designed to interface to next generation CFP2 and QSFP2 optical modules. They also have up to 72 13.1Gbit/s transceivers and can offer up to 2.8Tbit/s full duplex throughput. The devices can be used in a range of applications from low-cost 100G smart gearbox chips with 290,000 logic cells to the world's first 400Gbit/s FPGA with 870,000 logic cells including applications from a maximum of 400Gbit/s interfaces, and connectivity to legacy system side interfaces based on 3 or 6Gbit/s as well as 10Gbit/s ASICs and ASSPs. They can be used in line cards supporting OTU-4 transponders, muxponders or service aggregation router, lower cost 120Gbit/s packet processing line cards for multiple 100G Ethernet ports bridges , 400Gbit/s Ethernet line cards, basestations and remote radio heads with 19.6Gbits/s CPRI requirements, and 100 and 400Gbit/s test equipment.
