Synopsys recently announced the availability of DesignWare IP for the MIPI (Mobile Industry Processor Interface ) DSI (display serial interface) host controller. With this, the company expands its DesignWare MIPI IP portfolio consisting of the DigRFSM v3 (2.5G/3.0G) and DigRFSM v4 (4G), CSI-2, M-PHY and D-PHY protocols. The host controller is fully compliant to the latest MIPI Alliance specifications for DSI, Display Pixel Interface (DPI-2), Display Bus Interface (DBI-2) and Display Command Set. Using a single-vendor solution for DSI display subsystems lowers integration risk and cost while speeding up time-to-market of mobile systems-on-chip.
The configurable IP offers features that enable designers to easily incorporate display subsystems into mobile devices through a standard interface. The host controller can support up to four data lanes at speeds of up to 1Gbit/s of data per lane, providing a high-speed serial interface between an application processor and MIPI DSI-compliant display. Interface to the MIPI D-PHY is possible through the PHY Protocol Interface, as defined in the MIPI Alliance specification for the D-PHY (v.1.00.00). By supporting a range of resolutions from 160x120pixel (QQVGA) to 1024x768pixel (XVGA) with configurable virtual channels, the host controller IP addresses the diverse display demands of mobile devices. The low-power and area-efficient controller enables designers to reduce overall system cost and extend the battery life of their mobile devices.
