Logo
Get direct access via EPNdirect to Europe’s most comprehensive database of electronic products & suppliers
Search    Advanced Search Criteria

TOP PRODUCTS

Print | PDF | Digg This | Slashdot It! | Add to Del.icio.us |
Two No-Offset Bus Buffers
interoperate with static offset bus buffers
05/09/2011
Report dead link
Reference: 45844

NXP Semiconductors has introduced two I2C bus buffers, the PCA9525 and the PCA9605, which use the no-offset scoreboard method to decide signal direction, rather than using a directional pin and relying on offset voltages to control direction and prevent bus latch-up. The bus buffers are interoperable with static offset or incremental bus buffers. The company has also introduced the PCA9646, a buffered, four-channel switch with no-offset ports. All bus buffers work to 1MHz, and the PCA9605 and PCA9646 support Fm+ (fast-mode plus). The Fm+ no-offset bus buffers and switches are claimed to allow buses to be broken into segments or branches to isolate the bus capacitance into low capacitive segments meeting I2C-bus specifications. The bus buffers operate from 2.7 to 5.5V and are suitable for long-distance communications in enterprise computing applications such as servers and mass storage systems, and in industrial and automotive applications. The buffers' maximum supply current is 1µA in standby and typical 170µA operating for the PCA9525. The PCA9525 has 4mA pull-down outputs and the PCA9605 and PCA9646 have 30mA pull-down outputs. The buffers are available in a SOIC and TSSOP versions. 


NXP Semiconductors

High Tech Campus 60
5656 AG Eindhoven - Netherlands -
tel: +31 31 40 27 25182
fax: +31 31 6 5176 0795

Search in the archives
Advanced Search Criteria
Magazine_mai_2012_small
Loupe
issue
May 2012