Calypto Design Systems believes it is the first company to deliver ESL (electronic system level) hardware implementation to the mainstream market, following its acquisition of the Catapult C synthesis tool from Mentor Graphics. The company told Globalpress attendees that its exisiting SLEC system-HLS verification tool can be combined with Catapult C to create an integrated ESL hardware realisation flow, says the company. The move to higher levels of abstraction generated by ESL, based on C and SystemC, promises results in a shorter time. The combined offering delivers C synthesis, sequential verification, and power optimisation; the only integrated low available, claims the company. An ESL approach allows designers to work at a higher level of abstraction, greatly reducing errors and allowing greater optimisation of ICs in attributes like speed and power. Typically, designers have used extensive RTL verification to ensure that no errors have been introduced. The SLEC System-HLS uses patented sequential analysis technology to create a synthesis and verification flow environment. Designers can formally verify equivalence between SystemC ESL models and RTL implementations. This can increase speed by up to 100 times in RTL verification as it removes the need for RTL simulation to validate that the RTL matches the C or SystemC source.
