Dual and single high IF sampling 14bit, 310Msample/s ADCs from Linear Technology are designed for wide bandwidth digital pre-distortion linearisation. Digital pre-distortion enables a basestation transmitter to operate at its highest efficiency by sampling the distortion bandwidth at the output of the basestation transmitter and adjusting the input signal to cancel the power amplifier's intermodulation distortion. It allows 1dB compression point, where the power amplifier response is non-linear. The LTC2158-14 is claimed to be the first dual, 310Msample/s ADC to enable linearisation of transmission bandwidths up to 60MHz using I/Q sampling. It has a short pipeline latency of just five clock cycles for fast adaptation. The single version, the LTC2153-14, is for IF sampling architectures with transmit bandwidths of up to 30MHz. Transmit bandwidths have been limited to 20 to 40MHz, depending on whether an IF sampling or I/Q sampling DPD architecture is implemented. Increasing data demands means that basestations are being created to achieve transmit bandwidths of up to 60MHz. To linearise a 60MHz transmit bandwidth requires an ADC with a minimum resolution of 14bit and an I/Q sampling architecture with a minimum sample rate of 300Msample/s. The closed loop DPD algorithm requires short latency in the feedback path to improve efficiency in the power amplifier. Operating from a single 1.8V supply, the LTC2158-14 consumes 362mW/channel at 310Msample/s and offers SNR of 68.8dB and SFDR of 88dB at baseband with a 1.32V peak to peak input range. Analogue full power bandwidth of 1.25GHz and low jitter of 0.15psRMS enables under-sampling of IF frequencies. The ADCs offer double data rate LVDS digital outputs as well as programmable LVDS output current and optional 100Ω termination. They are available in 9x9mm (dual) and 6x6mm (single) QFN packages in commercial or industrial temperature grades. Demonstration boards and samples are immediately available.
