Xilinx has announced the availability of integrated software environment design suite 13.3 featuring capabilities for implementing bit-accurate single, double and full custom precision floating-point math operations in their designs targeting wireless, medical, aerospace and defence, high-performance computing and video applications. This flow is available through system generator for DSP and leverages the company's floating-point operator IP LogiCORE.
The floating-point operator core allows a range of floating-point arithmetic operations that can be performed in an FPGA. The operation is specified when the core is generated through the CORE generator tool and now system generator, and each operation variant has a common advanced eXtensible interface-4 streaming interface, claims the company. However, the design flow required an understanding of very high speed IC hardware description language or Verilog and simulation.
The design suite also adds Red Hat Enterprise Linux 6 and provides productivity enhancements for logic, embedded and system edition users, says the company. All editions contain enhancements to plug-and-play IP and device support for seven series devices. Embedded and system editions contain significant platform studio ease-of-use enhancements including the latest graphical design view. Logic edition contains productivity enhancement to the PlanAhead design analysis tool, including a graphical hierarchy viewer for hardware description language files.
