SpringSoft has added the Laker Blitz chip-level layout editor software to its family of Laker custom IC design and layout automation solutions for chip finishing applications. It enables high-speed viewing and editing of chip-level layouts to streamline tapeout-to-manufacturing operations. It is also suitable for designs with large data sets, such as advanced-node SoC implementations and large memory chips.
Chip finishing can be used to merge large design files, run DRCs (design rule checks), and make final corrections. It also loads and exports graphic database system II data files, offers good layout editing capabilities, and provides a large library of tool command language extensions for automating data manipulation, claims the company.
The software can perform cell, window or full-chip DRCs, and then find and fix violations without leaving the Laker Blitz environment. According to the company, layout editing and debug at the chip-level is simplified with advanced features, such as net highlighting commands to trace critical nets. The layout offers the power of controllable automation and good interoperability to achieve good layout results with less effort for analogue, mixed-signal, and custom digital designs, says the company.
