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Graphical design environment for programmable SoCs
26/01/2012
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Cypress Semiconductor has announced that version 2.0 of its PSoC Creator graphical design environment for the PSoC 3 and PSoC 5 programmable SoC families is available for free download. The design environment introduces support for the production PSoC 5 ARM architecture and devices as well as enabling the interoperation with the Keil µVision 4 IDE (integrated development environment). It boosts device performance through timing-driven routing enabling clock speeds to increase by as much as 20%, claims the company. It features an enhanced static timing analysis tools.

 

The design tool allows to customise the PSoC device to system requirements in minutes, says the company. It includes a rich library of tested and characterised analogue and digital components that can be drag-and-dropped into a design and configured to suit a broad array of application requirements, claims the company. The tool automatically places components into the PSoC device, routes all on-chip signals and directs I/O to the optimum pins. Each peripheral component is carefully parameterised so that the implementation is automatically optimised to fit the needs perfectly with no wasted resources. The build process generates a consistently-named set of APIs for each component.

 

The design tool also introduces peripherals, including Sony/Philips digital interface for digital audio, serial GPIO for hard disk drive controllers, an advanced and hardware-based fan controller, a voltage power sequencer, and an external memory interface to simplify hardware configuration. It includes more than 80 analogue and digital components in its portfolio.


Cypress Semiconductor

3901 North First Street
PO Box 649079
95164-9079 San Jose - USA -California
tel: +1 408 943 2600
fax: +1 408 943 2796

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