Curtiss-Wright Controls Embedded Computing has announced its 3U OpenVPX GPGPU (general purpose GPU) multi-core engine, the VPX3-491 GPU application accelerator. The small form factor accelerator features an Nvidia GPU based on the Nvidia Fermi architecture with 240 CUDA cores. Integrated into subsystem, the accelerator functions as a co-processor attached to a host Intel-processor board and takes advantage of the PCIe expansion plane definitions in the VITA 65 OpenVPX standard to provide off the shelf backplane support for high-speed interconnection between pairs of SBC and GPU. The combination of second generation Intel processors, gen2 PCIe interconnect and 240 Nvidia CUDA (compute unified device architecture) cores raises the performance bar for compact systems for demanding military DSP applications such as C4ISR, electro-optical and infrared, and satellite communication.
The GPGPU engine, combined with the company's VPX3-1256 3U OpenVPX SBC, is suitable for a military image processing program. The engine joins the 6U OpenVPX VPX6-490 to build 3 or 6U solutions, depending on the application requirements and the available SWaP envelope, with identical technology. Designed for computing, the Nvidia processors feature large internal shared memories, an L2 cache, and unified memory addressing to optimise CUDA-based applications performance and programmer productivity. The engine supports its GPU processor with a 2Gbyte, 256bit wide, 80Gbyte/s graphics DDR five memory subsystem to eliminate data bottlenecks and supports large signal processing datasets into the onboard memory. The engine supports a full 16-lane gen2 PCIe interface to the backplane, supporting the maximum possible bandwidth between host and GPU. It also supports eight-lane and four-lane PCIe interfaces. It features 12V power, rugged conduction-cooled versions, temperature sensors, and intelligent platform management interface.
