It is important to understand the latest shift from SD (standard definition) to HD (high definition), how it affects the IP-telephony market and, more importantly, how using DSPs in these applications can make HD voice a reality in the near future. When digital technology was first deployed for the telecommunications market, the decision was made to standardise on SD voice with a frequency limitation of 200 to about 3300Hz to conserve network bandwidth. This artificial limit clips speech well below the normal hearing range, which can range up to 20,000Hz. This explains why a phone conversation over the POTS network never sounds as good as speaking with someone in person. Now, subscribers are using broadband technologies without the 3300Hz limit for their "last mile" connections to the infrastructure. In some areas, fiber optic and other high-capacity media are even replacing copper wiring to the home. The typical residential broadband speeds have reached 5Mbit/s for downloads and 2Mbit/s for uploads. These new capabilities make HD voice a viable option, providing sounds over a much wider spectrum (Figure 1).

Figure 1: SD and HD codec comparison.

Real-time voice processing

The first hurdle for VoIP technology was measuring up to the long established standard for the voice QoS (quality of service) of analogue POTS (plain old telephone service). Designers began to implement IP phones based on DSPs to not to just meet the quality expectations that have been ingrained into consumers over the years for land-line voice, but to extend the quality of the telephone's audio experience well beyond "carrier-grade" voice to the nuanced richness and the robustness of CD-quality audio. In such applications, a DSP must be able to perform functions such as cancelling the signaling echo on the line that results from reflections caused by phenomena such as hybrid four-to-two-wire transitions and other anomalies, PCM (pulse-code modulation) processing, data-stream compression to conserve bandwidth, tone generation and detection, or acoustic-echo cancellation in speakerphone applications.

Dual-processing architecture

Mid- to high-end IP phones, rich in feature integration and application requirements, are usually best served by DSP-based SoCs. These SoCs feature multiple processing cores, in which the DSP is dedicated to the voice processing and a general-purpose RISC core manages and controls the system and user interface. Using a single RISC core without a DSP will be a very inefficient alternative because it takes more MIPS and consumes more power to carry out the same functions compared to an SoC device. A dual-processing architecture helps enable high-quality HD voice services and allows the flexibility to execute emerging new applications such as fixed/mobile convergence, PC/telephony integration, more powerful security algorithms, or e-mail and productivity tools. Advanced codecs that reduce bandwidth usage through processing-intense compression algorithms can be easily executed on a DSP core regardless of their high MIPS requirements, which can be 2 to 6 times higher.

Powerful but low power

Power-hungry IP phones drive up the operating costs and utility bills of enterprises. What's more, excessive heat dissipation in handsets brings up reliability issues. Using a power-efficient DSP will not only reduce the overall amount of power consumed, it can reduce the size and design of the phones. Key features to consider when choosing a DSP include fast real-time processing capabilities, a large on-chip memory, built-in power-management features, and several standby modes. Reducing the number of processor cycles needed to perform all phone functions is an effective way to reduce power consumption in an IP phone. Several of the more sophisticated DSPs, such as Texas Instruments' TMS320C55xTM DSPs, have built-in power-management features that reduce both operating and standby power consumption in IP phones. Having a high degree of control over peripherals allows the DSP to automatically partition on- and off-chip resources - such as the I/O interfaces, peripherals and memory - so the power can be turned off for a specific resource or a segment of the system when it is inactive.