The advent of PCI Express 2.0 means performance enhancements for the computer, storage, and communications industries, allowing a speed increase from the 2.5Gbit/s of the previous version to 5.0 Gbit/s. But this increase comes with significant validation challenges for development engineers in terms of capturing the signal, verifying power management and performing cross-bus analysis. For power management, the number of lanes in use or link width (up to 16 lanes), speed of the link, and idle states are dynamically negotiated to conserve power whenever possible. The TLA7S16 and TLA7S08 serial-analyser solutions from Tektronix offer test and validation of PCI Express versions 1.0 and 2.0. Unlike competing protocol analysers, these products provide detailed version 2.0 protocol information along with cross-bus analysis. In addition to the serial analysers, the P6716/P6708 mid-bus probes and pre-release slot-interposer probes are available to test and validate all layers of this high-data-rate serial protocol. The analysers plug into the company's TLA7000 series logic analysers, adding the ability to debug and correlate general-purpose signals and other system interconnects on the board, including memory and computer processors. They can acquire x1, x4 links or x8 links respectively, while two TLA7S16 analysers can be used in tandem to deal with bi-directional x16 links. This solution allows the user to time-correlate interactions between PCI-Express I/Os, processors, and memory chips using a single test platform, so that the test data does not have to be spread across multiple tools, making it more complicated to fathom out. To complement this solution, a high-speed serial-data analysis-software package has been introduced, which provides TDR/TDT and S-parameter support. The 80SJNB software runs on the DSA8200 digital serial analyser to present engineering staff with the means for complete serial-data-link analysis.