In an area that is exceptionally difficult to simulate, extracting all of the performance from high-speed, high-resolution data converters requires skills and experience that only a few possess. This is exacerbated when responsibility for the entire signal path is assigned to those with expertise in only a portion of the signal path.
The situation is especially true in high-speed receivers, where the latest generation of 16-bit ADCs now have sample rates over 100MHz and bandwidth approaching 1GHz. In addition to the technical challenge, the relentless trend of compressing the design-cycle time requires first-time success for circuit design and board layout. Applying SiP (System-in-Package) technology bridges the experience gap and helps keep pace with increasing performance and time-to-market demands.
Engineering is about finding practical solutions to difficult problems by applying existing technologies in new ways. SiP technology is commonly used in consumer applications such as USB memory sticks and RF modules in wireless handsets. Recently, it has been successfully applied to DC/DC converters to help designers overcome difficult design challenges for a wide range of applications. Linear Technology is now applying this technology to high-speed 16-bit receivers. Years of applications expertise have been packaged together with Linear's industry-leading high-speed ADCs and latest amplifiers to achieve the highest performance solution in a space-saving form factor.
System partitioning
The LTM9001 μModule receiver subsystem integrates a 16-bit, 130MSample/s ADC with a fixed-gain amplifier, anti-aliasing filter and bypass capacitance in less than half the area of traditional designs (Figure 1). The receiver consists of wire-bonded die, packaged components and passives mounted on a high-performance, four-layer substrate. It is intended to follow the high-order, high-selectivity filter after the final down-converting mixer stage. In time, several different versions of the device will be available. The amplifier gain is 20dB with an input impedance of 200Ohm and an input range of ±250mV. The matching network is designed to optimise the interface between the amplifier outputs and the ADC inputs under these conditions. Additionally, there is a two-pole bandpass filter designed for 162.5MHz ±25MHz to prevent aliasing and to limit the noise from the amplifier.
Subsystem analysis
Differential signal paths are commonly 200Ohm and are easy to accomodate for the RF engineer. With a traditional ADC, the input range is specified, but the impedance is a complex, switched-capacitor structure that kicks back current pulses at the sample rate and is therefore not a fixed impedance and is not easy to use in quick RF calculations. The input power of the LTM9001, with its ±250mV input span and 200Ohm differential input impedance, is easily calculated to be -14dBm. The data sheet specifies 72dB SNR, which includes the noise gain of the amplifier and the effects of the bandwidth-limiting filter.
Differential filter design
The anti-alias filter between the ADC driver and the ADC inputs limits the wideband amplifier noise and helps preserve the high SNR level of the data converter. The anti-alias filter is integrated in the LTM9001 and is a simple two-pole L-C type differential design. The design is characterised and 100% tested with SNR, and distortion fully specified over temperature. In the case of the LTM9001-AA, the filter is a 50MHz bandpass centered in the third Nyquist zone, found at 162.5MHz. Other versions of LTM9001 with different filters are in development.
Layout
Extracting the full performance from 16-bit, high-speed ADCs requires careful layout as well as good circuit design. Printed-circuit-board layout has a significant impact on performance even if the circuit topology and component values are correct. A common mistake is to assume that an IF of 162MHz means that high-frequency layout techniques are not required. But for high-performance ADCs like the one in the LTM9001, the bandwidth of the sample-and-hold is over 700MHz. High-frequency noise can be picked up by the sample-and-hold, reducing the SNR. This is an area that requires extensive experience.
Figure 1: Example of a simplified IF receiver.
Another simple example is the placement of supply-bypass capacitors. A common problem with traditional ADC board layouts is excessive noise due to long traces from the bypass capacitors to the data converter. Good practice is to locate the capacitor as close as possible to the supply pin of the device. In discrete designs, the die is wire-bonded to the leadframe of the IC package. The bypass capacitor is then slightly further away in the best circumstance. Conventional package size is dictated by the number of pins on its periphery or is perhaps chosen to adequately dissipate the power of the device. Therefore the bond wires are considerably longer than those in the µModule receiver: 3.5mm as compared to 0.8mm. Therefore, the internal bypass capacitors in the LTM9001 are much closer to the die than is possible in a discrete design. The device has a much smaller AC footprint, reducing the risk of collecting noise from unintended sources and raising the noise floor.
The substrate design incorporates many ideas that only come from years of applications experience. Furthermore, the whole collection of careful layout, proper circuit design and high-performance components is fully characterised and tested as a unit. The result is a portion of the system that requires very few external components (see the evaluation board shown in Figure 2). At this stage of the design, the device not only saves considerable time in design and layout, but potentially reduces the number of costly board revisions.
Conclusion
16-bit performance can be achieved only through attention to every detail and every interface when tackling high-sensitivity, high-speed signal paths. The competing demands for higher levels of performance at higher frequencies with smaller engineering teams and shorter design-cycle times highlights the need for experience in multiple disciplines. Even with a perfect circuit design, such minor layout issues as placement of supply-bypass capacitors can impact performance. SiP technology, now being applied to high-speed receivers, integrates one of the key interfaces in that signal path. Not only does the LTM9001 integrate IC components of differing process technologies with passive components but it also effectively integrates part of the layout skill required to maximise performance. By bridging the experience gap, this μModule receiver improves first-time success and accelerates the design cycle.
Figure 2: The Linear Technology LTM9001 evaluation board.
