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Full-chip RF Extraction
July 18, 2006 Applied Wave Research and Helic announced a technology licensing agreement that enables the integration of Helic s VeloceRF whole-chip radio frequency (RF) extraction, modeling, and verification technology into AWR s Analog Office RF IC design suite
18/07/2006
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The integrated product provides analogue and RFIC designers with a new level of interactivity and ease-of-use through AWR s unified and open RF design platform, while enabling full access to all the features and capabilities of Helic s industry-leading extraction technology. The combined solution will provide the highest level of accuracy and performance for large-scale RFICs, thus maximizing designers productivity and shortening the product development cycle time for wireless communications products.VeloceRF extracts distributed models for RF interconnects, including magnetic coupling coefficients among interconnect lines and spiral inductive components. By introducing complex electromagnetic (EM) effects early in the design cycle, it accelerates the development process for complex RF chips and ensures first-pass results. The AWR unified RF data model coupled with its second generation Intelligent Net (iNet2) interconnect technology provides a comprehensive set of interconnect models spanning from ideal short circuit, to lumped element, to transmission line model, to full 3D EM model. The incorporation of Helic’s VeloceRF full-chip extraction technology extends the range of interconnect modeling to include extraction of distributed resistance, capacitance, inductance and mutual inductance (RCLK) models, and coupling spiral inductors directly from physical layout. This enables full flexibility in accuracy and performance trade-offs during RF analysis.



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